1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method of fabricating a semiconductor device. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for fabricating nano-scale devices without resorting to a photolithography process.
2. Discussion of the Related Art
Conventionally, photolithography is a required process in fabricating a semiconductor device. As dimensions of semiconductor devices become further reduced, a photolithography process almost reaches to its limits. Moreover, at least dozens of masks are required in the semiconductor device fabrication process. For instance, in order to fabricate 1 giga DRAMs using a conventional photolithography process, about forty masks are necessary to complete the process since the size of a unit cell becomes about 180 nm.
Although single electron transistors (SET) have been researched recently, an appropriate process for integrating single electron transistors has not been fully developed. Further, quantum dots, which are an essential element of the single electron transistors, are still larger than nanometer dimensions. Thus, problems in forming and arranging the quantum dots having desired size and location are yet to be solved in this area.
As previously described, the conventional method of fabricating a semiconductor device has the following problems.
Since patterns having dimensions larger than nanometers can not be processed due to the limitation of the photolithography process, it is impossible to fabricate nano-scale semiconductor devices. Moreover, since at least dozens of masks should be used in a fabricating process of a semiconductor device using photolithography technology, the process becomes very complicated and the production yield becomes low.